When choosing memory cards for portable devices, understanding the technical differences between microSD Express and UHS-I cards helps identify compatibility and performance boundaries. While both bus interfaces are defined by the SD Association for SDHC, SDXC, and SDUC memory cards, they use distinct pin row structures, bus interfaces, and protocols.
Pin Row Structure and Interface Architecture
The standard UHS-I bus interface provides data transfer using a single row of pins. In contrast, SD Express introduces a second row of pins that provides Low Voltage Differential Signaling (LVDS) technology to support high-speed data transfer.
According to the SD Association bus speed standards overview, SD Express pairs this hardware layer with the PCI Express (PCIe) bus interface and the Non-Volatile Memory Express (NVMe) application protocol.
Theoretical Bus Speed Ceilings
Physical interface architectures and specification versions establish distinct theoretical bus speed limits:
| Bus Interface | Specification Version | Signaling / Lane Configuration | Maximum Bus Speed |
|---|---|---|---|
| UHS-I | Version 3.01 | Single row (SDR50, DDR50, SDR104) | 104 MB/s (SDR104) |
| SD Express (microSD) | Version 7.10 | PCIe Gen 3 × 1 Lane | 985 MB/s |
| SD Express (microSD) | Version 8.00 | PCIe Gen 4 × 1 Lane | 1970 MB/s |
As documented in SD Association specifications, microSD Express under Version 8.00 supports only PCIe Gen 4 × 1 Lane (up to 1970 MB/s). In comparison, full-size SD Express cards can reach up to 3940 MB/s via PCIe Gen 4 × 2 Lane configurations.
Device Capabilities and Transfer Speed Factors
According to the SD Association bus speed documentation, maximum transfer speed differs from raw bus interface speed and varies depending on individual card performance.
Additionally, the average speed at which a device writes data to an SD memory card may vary depending upon the host device, the operation being performed, and how other data is stored on the card.
Text version of the diagrams
- UHS-I vs SD Express: UHS-I — Single pin row; SD Express — Two pin rows; Protocols — PCIe plus NVMe
- Theoretical Bus Ceilings: UHS-I — Up to 104 MB/s; Express 7.10 — PCIe Gen 3 x1; Express 8.00 — PCIe Gen 4 x1 only
Research Method and Limitations
This explainer was prepared entirely from the supplied public technical excerpt published by the SD Association. No hands-on testing, hardware benchmarks, or physical pin measurements were conducted. Competing coverage was not available for comparative review. The supplied excerpt specifies one-row versus two-row contact architectures but does not document individual pin assignments, electrical contact dimensions, or fallback compatibility behavior.
